1. Field of the Invention
The proposed invention relates to a method for eliminating the etching microloading effect, and more particularly to a method of forming wide and narrow trenches with same depth simultaneously.
2. Description of the Prior Art
In most of practical semiconductor fabrications, there are a plurality of elements in a layer of an integrated circuit and each element has individual shape and size. When an etching process is used to form these elements, fabrication of these elements comprises following steps:
First, a photo-resist is formed on the layer with many openings where each opening corresponds to a specific element.
Second, effecting an etching process to etch the layer and to form a plurality of trenches in said layer, where each trench corresponds to a specific element.
Third, performing following fabrication such as depositing to completely form these elements.
It should be noted that because the distance between any two adjacent layers is fixed in a multi-layer integrated circuit, depth of any the underlying layer maybe are destroyed by these trenches. This is a primary restriction of formation of these trenches.
No matter how, the primary restriction is violated by the key technical issue for the plasma etching process: the etching microloading effect. The etching microloading effect means that when ions do not totally vertically collide to a substrate, the colliding probability of a wide trench is higher that the colliding probability of a narrow trench, then both etching rate and depth of any trench are different to each other.
Refer to FIG. 1A where the mechanism of the etching microloading effect is briefly explained in the provided example. As FIG. 1A shows, dielectric layer 10 is formed on substrate 11, where substrate 11 comprises metal oxide semiconductor transistor and isolation. And when integrated circuit is a multi-layer integrated circuit, substrate 11 further comprises a multi-layer trench with a plurality of dielectric layers, a plurality of contacts and a plurality of interconnects. On the surface of dielectric layer 10, photo-resist 12 is formed with first opening 13 and second opening 14, where width (W1) of first opening 13 is smaller than width (W2) of second opening 14.
Owing to the ability of available plasma reactor, it is obvious that during an etching process, ions 15 do not totally vertically collide dielectric 10. Therefore, the wider width of second opening 14 increases the probability that inclined incident ions 15 collide to dielectric layer 10. And the result is the etching rate is larger in second opening 14 but is lower in first opening 13. The phenomenon is known as the etching microloading effect.
Consequently, the result of the etching microloading effect is shown in FIG. 1B. Obviously, first trench 16 that corresponds to first opening 13 is shallow and second trench 17 that corresponds to second opening 14 is deep. Therefore, either second trench 17 just touches substrate 11 but first trench 16 does not touch substrate 11, or first trench 16 just touches substrate 11 but second trench 17 penetrates substrate 11 and maybe be destroy some structure inside substrate 11.
According to previous discussion, it is obvious that etching microloading effect is serious and it is desired to develop a method for forming a plurality trenches with same depth but individual width.